USB3382-AB-1U1D RDK

USB 3382, PCI Express to USB 3.0 Peripheral Controller o Compliant to the USB 3.0 Specification o 1 upstream port o Supports SuperSpeed, Hi-Speed, Full-Speed modes o Four Descriptor-based DMA channels for automatic data transfers o Supports USB Duet® Technology o USB Auto-Enumeration Technology o Support for Bulk, Isochronous, and Interrupt Endpoints o USB Power Management  USB 3.0 link power management states: U0, U1, U2, U3  USB 2.0 link power management states: L0, L1, L2  PCI Express Interface o Four GPIO pins for maximum design flexibility o I2C configuration/control option o 10mm x 10mm 136-pin aQFN package with 0.5 mm pitch o I-Temp support and Pb-free © PLX Technology, www.plxtech.com Abundant Software As the successor of the gold standard NET 2280, PCI to USB 2.0 peripheral controller, the USB 3382 can be used with existing NET 2280 software with no or minimal change. Driver stacks are already available in common OS’s such as Windows (XP, Vista, 7 and CE), Linux, and VxWorks. USB Duet software from PLX will provide the fastest PC interconnect at 400 mega bytes per second of transfer speed with just a simple USB cable. PCIe PHY PCIe US/DS Port Memory Based Switch PCIe DS Port PCIe PHY I2C 8051 DMA USB IN FIFOs text USB OUT FIFOs SPI USB 2.0 PHY To USB Hi/FULL SPEED HOST USB 3.0 PHY To USB SUPER SPEED HOST USB Client Controller  General The USB 3382 provides a matching bandwidth at 5 GTps between the PCI Express Gen 2 bus and the USB 3.0 SuperSpeed bus. The controller can easily add a USB 3.0 client port to an existing PCI Express system, as well as convert existing PCI Express functions (endpoints) to a USB 3.0 product. The internal high performance switch can configure the two PCI Express ports into one x1 upstream + one x1 downstream, one x2 upstream, two x1 downstream, or one x2 downstream port. The flexibility allows different system configurations to achieve the maximum performance of the product. PCIe RC/EP o PCI Express Gen 2 (5Gbps) o Electrical Compliance to PCI Express Base Specification r2.0 o Integrated root complex and switch provides four configurations:  one x1 upstream port and one x1 downstream port  one x2 upstream port  two x1 downstream ports  one x2 downstream port o Reference Clock Buffered Output signals for downstream ports (RC mode) o Low latency o PCI Express Power Management  All link power management states: L0, L0s, L1, L2, L2/L3 Ready, and L3  Device states: D0 and D3(hot & cold)  Vaux, Wake#, Beacon support o 256 byte maximum payload size High Performance and Flexibility x1  USB 3.0 Client Interface The USB 3382 is a PCI Express Gen 2 to USB 3.0 SuperSpeed Peripheral Controller. It features two PCI Express Gen 2 x1 ports and one USB 3.0compliant client port. PLL x1 Features Figure 1: USB 3382 Block Diagram Applications Target applications for the USB 3382 as a PCI Express endpoint include PCs, servers, docking stations, printers, and PCI Express embedded systems. The main applications for the USB 3382 as a PCI Express root complex include WLAN dongles, graphics/video dongles, and HDTV tuners/codec. Page 1 of 2 6/22/2012, Version 1.2 USB 3382, PCI Express to USB 3.0 Peripheral Controller Migrate PCI Express Endpoints to a USB 3.0 Product Add a USB 3.0 Client Port to PCI ExpressBased Systems The USB 3382 is designed to easily convert existing PCI Express endpoints/adapter cards to a standalone USB 3.0 product. The USB 3382 can also be used to easily add a USB 3.0 client port to any PCI Express based embedded system. Figure 3: Combine the two PCI Express ports of the USB 3382 into one x2 PCI Express Gen 1 connection to maximize 5Gbps bandwidth Figure 2: Creating a multi-function USB 3.0 device with two PCI Express based wireless radios and the USB 3382 Instead of a CPU configuring the PCI Express endpoint, the USB 3382 can itself act as the PCI Express Root Complex, with configuration information coming from its internal 8051 CPU or from the USB host. AutoEnumeration Technology allows a standard USB host to detect this new USB device even if no firmware has been run. This means that firmware can actually be downloaded to the USB device after initial boot-up. The USB 3382 includes PCI Express clock and other standard signals to compensate for features usually found in a typical PCI Express Root Complex environment. The USB 3382 supports two pairs of buffered, 100 MHz HCSL output clocks, one pair for each downstream port when configured in Adapter mode with one downstream port or in Root Complex mode (one or two downstream ports). Each clock output pair can be disabled by software or serial EEPROM when not in use, for additional power savings. This feature greatly reduces system BOM cost by eliminating the need for extra clock buffers on the PCB. Development Tools PLX offers hardware and software tools to enable rapid customer design activity. These tools consist of a hardware module (USB 3382 RDK), hardware documentation (available at www.plxtech.com), and a Software Development Kit. Both USB host and peripheral-side software is included with the USB 3382 RDK. The host-side software consists of USB drivers and test applications. The peripheral-side firmware is used to configure the USB 3382 to resemble a standard USB class device (like a printer or mass storage device) for which no USB host drivers will need to be written. For custom applications, firmware APIs are provided to abstract the USB transactions to reads and writes. While this software is available for various operating systems, it is written in standard C with portability in mind. Product Ordering Information Part Number Description USB3382-AB50NI G Two x1-port PCI Express Gen 2.0 to USB 3.0 SuperSpeed Peripheral Controller (10x10mm2) USB3382 Rapid Development Kit + CM107 (one x2 upstream port) USB3382 Rapid Development Kit + CM160 (one x1 upstream, one x1 downstream) USB3382 Rapid Development Kit + CM110 (two x1 downstream ports, Root Complex Mode) USB3382 Rapid Development Kit + CM108 (one x2 downstream port, Root Complex Mode) USB3382-AB-2U RDK Shared memory in the USB 3382 functions as main memory for holding descriptors or other control data. The integrated 8051 CPU can also be used to configure the device to resemble a standard USB class device (like a communications or video device) even if there is no local intelligence on the peripheral. USB3382-AB-1U1D RDK USB3382-AB-1D RDK USB3382-AB-2D RDK Visit www.plxtech.com for more information. © PLX Technology, www.plxtech.com Page 2 of 2 6/22/2012, Version 1.2